ARM Launches Fault-Tolerant Processor to Cut Cost of Future Car Development
ARM announced at the Fall Processor
Forum in San Jose, California, the new ARM(R) Cortex(TM)-R4F processor to
reduce the cost and design-time of future automotive electronic technology.
The Cortex-R4F processor will enable ARM Partners to meet the stringent
error-free safety standards and high performance requirements of automotive
applications including next-generation Anti-lock Braking (ABS) and vehicle
The advanced features of the Cortex-R4F processor specialized for the
automotive market include support for Error-Correcting Code (ECC) memory, the
extension of error detection into the interconnect and a synthesis-optional
Floating-Point Unit (FPU).
"Vehicle OEMs need to continually innovate in order to meet tightening
emissions and safety legislation, while adapting to changing consumer
expectations," said Chris Webber, vice president, Automotive Practice,
Strategy Analytics. "The ARM announcement of the Cortex-R4F processor is
extremely timely as designers of next-generation automotive control systems
look for highly robust floating-point processor solutions that are needed for
the innately intelligent backbone which will be part of even the most
"Automotive systems require high performance at the very highest levels
of reliability to maintain our stringent safety standards," said Berthold
Fehrenbacher, engineering manager, of Robert Bosch GmbH. "The Cortex-R4F
processor enables Bosch to provide this through extensive features that are
closely aligned to our product requirements."
The Cortex-R4F processor builds upon the advanced features of the
Cortex-R4 processor. These features include configurability during synthesis
to optimize the processor for different applications through a
high-resolution memory protection unit, caches, tightly-coupled memory, DMA
and debug facilities. This configurability is provided without compromising
the underlying ARM instruction set compatibility, maximizing the reuse of
existing software investments by application developers and third parties.
In addition, the Cortex-R4F processor brings a strong focus on safety
with high resolution memory protection facilities to allow tight control over
independent software tasks This is critical to applications based on the OSEK
standard for an open-ended architecture, the JasPar Automotive software
platform architecture, and the AutoSAR runtime environment. ARM is a premium
member of AutoSAR which has wide industry support with members such as BMW,
Bosch, Continental, DaimlerChrysler, Ford, GM, Siemens and VW. ARM is also a
member of JasPar, whose board members include Toyota, Nissan and Honda.
"The automotive industry is going though a transformation, with the
emergence of 32-bit processors as the catalyst for new standards of
functionality, intelligence and performance in future car technology," said
Mike Inglis, executive vice president, Marketing and Business Development,
ARM. "The new Cortex-R4F processor joins the Cortex-M3 processor as the next
step in the evolution of ARM automotive technology, building on the heritage
of the ARM7TDMI(R) and ARM9E(TM) processors which have been driving this
industry over the last ten years."
"Sophia Systems' EJ-Debug and EJ-Extreme debug solutions enable design
engineers to develop their next generation devices quickly and easily based
on the ARM Cortex family," said Tasuku Kashihira, CEO and COO, Sophia
Systems. "To maintain safety standards in increasingly complex automotive
systems, good visibility into all parts of the system is vital. The
incorporation of CoreSight(TM) debug infrastructure with the Cortex-R4F
processor provides this, and is an example of the way ARM have matched the
processor's feature set to the needs of this market."
Features for Automotive Advancement
The Cortex-R4F processor is designed to enable ARM Partners to meet
error-free automotive safety standards through seamless support for error
detection from the processor, through the interconnect and into peripherals,
providing true system-wide protection.
ECC technology monitors memory accesses to detect and correct errors. If
a memory error occurs the ECC logic will correct it, rather than just
communicating the error and stopping the system. With embedded error
correction in the Cortex-R4F processor, ARM Partners do not need to design
external ECC logic, simplifying implementation and aiding IEC61508
certification. Careful integration of ECC within the processor pipeline
allows this to be achieved without the performance penalty which is normally
associated with this level of protection.
With the increasing volumes of data transmitted throughout
next-generation SoCs, it is critical that system designers can offer
system-wide error detection to increase the fault tolerance of automotive
applications. The Cortex-R4F processor extends the traditional processor
feature of error detection throughout the SoC, meaning that previously
erratically checked data can be scanned continuously for errors to increase
reliability throughout the system.
Cortex-R4F Processor-based System Benefits
The Cortex-R4F processor also provides significant benefits for other
applications. In networking, for example, it is critical that unplanned
outages are minimized as they can contribute to lost sales, increased
overtime and loss of employee productivity. According to an Infonet Report
Service report titled "The Consequences of Network Downtime," the average
cost of enterprise application downtime is $10,000 per minute. The Cortex-R4F
processor's embedded ECC memory helps to reduce the possible causes of system
failure to increase network resiliency and avoid these effects.
In addition, the Cortex-R4F processor's FPU performs floating-point
calculations that allow a greater dynamic range and accuracy than fixed-point
calculations. The FPU is backward compatible with earlier ARM FPUs and is
optimized for the single precision processing most commonly used in
automotive applications. By using single precision values to represent data
instead of converting to double precision, it is possible to process data
twice as quickly while maintaining the required accuracy to increase the
efficiency of the SoC design. The FPU is particularly useful in sophisticated
control applications, where algorithms are often modelled in an environment
such as Simulink or ASCET-SD, and code auto-generated using tools such as
Real Time Workshop Embedded Coder, ASCET-SE or dSPACE Targetlink.
"Optimized technologies in the Cortex-R4F processor such as fast
floating-point processing are important for advanced system designs, and
platforms that offer such capabilities can give designers a clear advantage,"
said Jim Tung, MathWorks fellow, The MathWorks. "Companies like ARM and The
MathWorks that are committed to helping system designers to address their
challenges have long been investing to develop tools that enable those
designers to do more in less time. ARM has listened to its customers and has
provided a new product that works with Simulink for Model-Based Design to
automatically generate highly optimized single precision production code for
embedded systems using Real-Time Workshop Embedded Coder."
The Cortex-R4F processor features an advanced microarchitecture with dual
instruction issue capability to deliver more than 800 Dhrystone MIPS in a
performance optimized 90nm implementation, based upon an ARM Artisan(R)
Advantage(TM) library. The processor also provides key savings in cost and
power consumption for system developers, occupying less than 1mmsquared and
consuming less than 0.27mW/MHz in an area optimized 90nm implementation.
Relaxed timing on the level 1 memory allows dense, low power RAMs to used,
extending the area saving beyond the processor logic to the memory, which may
account for a substantial portion of the total cost.
ARM has developed a full range of supporting technology around the new
processor to reduce design time and accelerate time-to-market. This complete
system solution includes development and debug tools, modeling technology and
physical cell libraries.
- The Cortex-R4F processor is supported by the ARM RealView(R)
DEVELOP family of software development tools, the RealView CREATE family
of ESL tools and models, and CoreSight debug and trace technology for
developing embedded systems quickly.
- The efficient design enables higher performance at lower clock
frequencies than previous ARM processors and the optimized Artisan
Metro(TM) memories can provide a further reduction in the size and cost
of embedded systems.
- The AMBA(R) Designer design automation tool provides a design
flow for advanced AMBA interconnect sub-systems, further reducing
implementation costs and time-to-market. Additionally, the AMBA 3 AXI(TM)
protocol-compliant ARM PrimeCell(R) peripherals including the AMBA 3 AXI
Interconnect (PL301), Configurable Dynamic Memory Controller (PL340),
Static Memory Controller Family (PL350) and L2 Cache (L220) further
improve the performance of the processor.
The Cortex-R4F processor runs the ARMv7 ISA making it fully backwards
compatible with existing ARM code that powers billions of systems around the
world, and is optimized for the Thumb(R)-2 instruction set. Using the Thumb-2
instruction set, together with the ARM RealView Development Suite, allows
on-chip memory sizes to be reduced by up to 30 percent, saving significant
cost in the system. In addition it can produce a 40 percent performance
improvement over the previous Thumb instruction set running on an
ARM946E-S(TM) processor. As memory is an increasingly large proportion of a
chip, this provides a significant saving in area and cost to chip makers
using the processor for automotive designs.
The ARM Cortex-R4F processor is available for licensing now, along with
the majority of the supporting technology. The Instruction Set Simulator and
RealView Development Suite tools environment for the Cortex-R4F processor are
available today to lead and existing licensees, and for general release on
request. The complementary technologies for implementing full SoC solutions
such as the AMBA 3 AXI Interconnect (PL301), Configurable Dynamic Memory
Controller (PL340), Static Memory Controller Family (PL350) and L2 Cache
(L220) are all available now.