Automotive electronics systems design focused on enhancing engineering productivity for car infotain
Altera Automotive Graphics Platform Enables “Design Once, Make Many” Applications
Altera Corporation has recently introduced the Altera® Automotive Graphics System (AAGS), a scalable solution that enables design engineers to quickly and efficiently design multiple automotive infotainment products based on a single electronic design.
Implemented in Altera’s low-cost Cyclone® series or high-performance Stratix® series FPGAs, the AAGS enables designers to overcome the lengthy and costly design cycles of fixed-function graphic controllers.
The AAGS design platform integrates Altera’s Nios® II embedded processor with third-party intellectual property (IP) and design tools from automotive graphics partners including:
TES Electronic Solutions OpenGL ES-compliant graphics library and embedded 2D/3D Graphic Multiplatform Library (eGML), for the real-time generation of display graphics
Imagem’s spline-based library for handling bitmaps, frame buffer accesses, drawing of graphic primitives and object handing and movement
SEGGER’s Microcontroller Systeme GmbH support for emWin Altia’s GUI building tool for quick automotive human machine interface (HMI) development
In addition to the Nios II processor, the AAGS incorporates a LCD timing controller, a basic multi-layer multi-display controller, a sophisticated spline manipulation engine and a vector graphics acceleration engine. For more information, visit www.altera.com/end-markets/auto/graphics-processing/aut-graphics-processing.html.
“An FPGA-based solution gives automotive designers a highly efficient means for modifying their designs so they can create product differentiation and quickly meet changing market requirements without costly system redesign,” said Todd Scott, senior director of Altera’s consumer, automotive, broadcast business unit. “To beat the overall cost of standard cell solutions, AAGS customers can go directly to production with the low-cost Cyclone series FPGA, or for more complex designs that require implementation in a high-performance Stratix series FPGA, migrate to a HardCopy® structured ASIC to drive down costs.”