Xilinx, Inc. (NASDAQ:XLNX) today announced its programmable solutions roadmap based on the Media Oriented System Transport (MOST) networking protocol for automotive electronics. Based on its market-leading programmable logic devices (PLDs), the complete hardware/software offering includes a high-performance MOST Network Interface Controller (NIC), associated software stack, and application-tailored intellectual property (IP) cores. The Xilinx solution enables automotive Tier Ones to quickly and cost-effectively develop in-vehicle entertainment systems that can scale and evolve as new features and capabilities become available.
Already the leading PLD provider to the automotive industry with its Xilinx Automotive (XA(TM)) family, Xilinx offers automotive designers the choice of the lowest cost per gate in the industry with 90-nanometer (nm) Spartan(TM)-3E FPGAs or the high-performance features of its 90nm Virtex(TM)-4 FX12 XA devices. The addition of solutions for the MOST protocol provides automotive electronics developers with a flexible, scalable and cost- competitive alternative for implementing customized systems.
The solution was developed in close collaboration with Volvo Car Corporation of Sweden, who encourages the entrance of further sources of cost effective, flexible and highly integrated components for infotainment networking into the market space. The support and collaboration of a premier auto maker such as Volvo Car Corporation throughout the development efforts made it possible for Xilinx to align its ongoing development with the requirements of the automotive industry.
“This is a significant milestone for a critical automotive standard. For the first time, Tier Ones have a ‘no compromises’ solution for developing MOST-based products, providing a new level of architectural flexibility to meet customer requirements without sacrificing time, cost or capabilities,” said Kevin Tanaka, worldwide automotive marketing and product planning manager at Xilinx. “Also, the programmability and ease of implementation on FPGAs enables them to address a broad spectrum of market needs in a timely way.”
The Xilinx ‘end-to-end’ solution integrates all the hardware and software elements from Xilinx and its ecosystem partners required to implement a full- featured MOST solution. For the first time, product developers can separate their specific applications, which are their unique value-add, from the MOST network requirements specified by the original equipment manufacturer (OEM). This programmable hardware approach provides developers with optimal architectural flexibility for targeting different end user needs and the ability to determine their own system partitioning instead of letting the silicon supplier define it, as is the case with existing application-specific standard part (ASSP) implementations.
At the core of the solution is the Xilinx MOST NIC, which will be made available in the Xilinx LogiCORE(TM) library. It can be implemented in either a Virtex-4 or Spartan-3 series device with support available for the soft 32- bit MicroBlaze(TM) and embedded PowerPC(TM) processors. The Xilinx offering supports the requirements of a scalable and reliable MOST-based network with a 24.8 Mb/s streaming port that enables real time synchronous data transfer, in addition to logical channel-based support for all synchronous and asynchronous data. The flexible, easy-to-implement solution is ideal for designing MOST controllers in modules that require real-time processing, such as DVD players, head units, GPS systems, and displays. It will be fully tested for compliance to the standards defined by the MOST Cooperative. The Xilinx solution also comes with a complete embedded development platform featuring a MOST daughter card.
Robust IP Support
The Xilinx solution is supported by a library of IP for critical MOST functionality from Mocean Laboratories AB (Sweden), a member of the Xilinx Alliance Program. The Mocean IP includes cores and software interfaces, such as MOCEAN Network Services middleware, Digital Transmission Content Protection (DTCP), Data Router, and Asynchronous Sample Rate Converter (ASRC).
To further ensure a total cost-competitive solution that is both reliable and flexible, Xilinx has collaborated with IDT(TM) (Integrated Device Technology, Inc., San Jose, Calif.) on a device designed specifically for use with the Xilinx MOST NIC LogiCORE(TM) IP. The IDT chip is able to generate a master clock in master applications and lock to the receive data stream for clock recovery.
“IDT has established leadership in the silicon-based timing market, and is well suited to meet the overall timing requirements for MOST-enabled systems,” said Patrick Griffith, director of product marketing for the IDT MicroClock division. “We are pleased to have aligned with Xilinx to develop a superior device enabling Tier Ones serving the automotive market to realize greater flexibility and reliability.”
Xilinx plans to make the MOST NIC LogiCORE(TM) IP available starting in the fourth quarter of 2006, including support for MOCEAN Network Services. The IDT PLL/Clock Recovery chip will begin sampling in the first quarter of 2007.